With reference to FIG. 1 and FIG. 2, the basic structure of an array substrate of a current display device generally comprises: a substrate base 1, a gate 2 and a gate line 2′, a gate insulating layer 3, an active layer 4, an ohmic material layer 5, a source 6a, a drain 6b and a data line 6′, a protective layer 7, a first passivation layer 8, a common electrode 10′, a second passivation layer 11, and a pixel electrode (not shown in the figures), etc. In general, it is needed to undergo eight times of patterning process so as to be able to complete the production of an array substrate, including forming a via for conduction disposed between electrodes at different layers by etching.
However, since the materials of the different layers are different, in the procedure of forming a via penetrating at least two layers by etching, it very easily results in poor chamfering of the via in one and the same etching process due to lateral etching rates being different (as shown in FIG. 2), thereby causing the electrical performance to degrade. Especially, a via for conductively lapping the pixel electrode and the drain (or the source) needs to penetrate the protective layer, the first passivation layer and the second passivation layer. Yet, the material of the protective layer is generally silicon nitride, the material of the first passivation layer is generally a photosensitive resin, etc., and the material of the second passivation layer is generally low temperature silicon nitride, etc. The lateral etching rates of the three materials in one and the same etching process are distinct, resulting in poor chamfering of the via, such that the contact of the pixel electrode and the drain (or the source) is poor, which brings about the problem of abnormal pixel display such as constant bright spots, dark spots, interlaced alternating lightness and darkness, etc. of a display screen.